Abstract
Brief paragraph on the system problem definition:In Software Defined Radio
(SDR) receiver, power consumption is one of the major issues. In the Sample Rate
Conversion circuit (SRC) of the SDR receiver, the polyphasedecomposition comb
decimation filter is widely used for its power efficiency.
Presents the proposed System and its main objectives, comparing with the
other current alternative systems:
In this report, a power efficient clock/data distribution techniques for the delay
elements of the polyphase decomposition comb filter is introduced. Applying the
proposed technique on the polyphase comb filter results in a significant reduction in
its dynamic power consumption, specifically, and that of the receiver baseband part,
generally, comparing with the conventional polyphase filters used.
Write in brief the method and the technology you use to design and to
implement your system:
The main functions and algorithms of the proposed system are achieved based
on image processing, while the system is implemented based on Field Programmable
Gate Arrays ( FPGAs).
Write the main outcomes and contributions of the proposed system you have
achieved (up till writing the report), comparing with the most commonly applied
systems (if possible)
It is shown that by applying the proposed technique the dynamic power
consumption of the SDRreceiver baseband is reduced (orcan be reducedif you aren
sure yet) by EEn.
No references added in the abstract
i
Acknowledgment
ii
TABLE OF CONTENTS
Page
Abstract
i
Acknowledgement
ii
Table of Contents
iii
List of Figures
vi
List of Tables
vii
List of Abbreviations
viii
Chapter I: Introduction
1
1.1 Problem definition
1
1.2 Applied systems
2
1.3 Aim
1.4 Objectives
1.5 Functional Requirements
3
1.6 Technology involved
3
1.7 Report Organization
4
Chapter II: Review of Literatures
5
2.1 History
5
2.1.1.System1
2.1.1.1 System1 Description
2.1.1.2 Advantages and Disadvantages
5
2.1.2. System 2
2.1.2.1 System1 Description
2.1.2.2 Advantages and Disadvantages
6
2.1.3.System 3
7
2.2 Current alternative systems
8
2.2.1.System 1
2.2.1.1 System1 Description
iii
2.2.1.2dvantagesandDisavantages
8
2.2.2.System 2
9
2.2.2.1 System1 Description
2.2.2.2dvantagesandDisavantages
2.3 Summary
Chapter III: Proposed system Design
3.1 Initial Design
11
3.1.1 Initial Block Diagram
3.1.2 Initial Flowchart
3.2 Detailed Design
3.2.1 Detailed Block Diagrams
3.2.2 Detailed Flowcharts
3.3 Components Selection
3.3.1.Component#1
13
3.3.2.Component#2
14
3.3.3.Component#3
15
3.3.4.Component#4
16
3.4 Schematic/Circuit Diagrams
18
3.5 S/W tools selection
3.6 Pseudo Code Algorithms
3.7 Testing method
19
3.8 Summary
19
Chapter IV: Cost Analysis (Optional)
20
4.1 Prototype and economical cost analysis
20
Chapter V: Time Plan
21
Chapter VI: Conclusions and Grad II Work Plan
22
6.1 Conclusions
22
6.2 Grad II work plan
22
iv
References
23
In the appendices you should add Data sheets and your SW codes if applicable.
Appendix A
25
Appendix B
27
v
List of Figures
Page
Fig. 1.1 Block diagram of the digital radio transceiver
1
Fig. 1.2 Software Defined Radio (SDR)
2
EEEEEEEEEE…EEEEEEEEEE.
E`Add all figures of Chapter1 EEEEn
EEEEEEEEEEŠFig. 2.1 Software Defined Radio (SDR) Receiver
6
Fig. 2.2: A modulator and its linear model
9
Fig. 2.3: First order Sigma-Delta Modulator
11
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E`Add all figures of Chapter2 EEEEn
EEEEEEEEEEŠFig. 3.1: Block diagram of a classical Comb decimation filter
24
Fig. 3.3: Block diagram of Cascaded Integrator Comb (CIC) decimation filter.
24
EEEEEEEEEE…EEEEEEEEEE.
EAdd all figures of Chapter3 EEEEn
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`Continueadding all figures of the other chapters the same way JEEEEEEEEEEŠEEEEEEEEEE…EEEEEEEEEE.
vi
List of Tables
Page
EEEEEEEEEEŠE`Add all Tables of Chapter1, 2,f any EEE.
EEEEEEEEEEŠTable 4.1: General form of the modified Comb filter.
42
EEEEEEEEEEŠE`Add all Tables of Chapter4 EEEEn
EEEEEEEEEEŠTable 5.1: Improvement in SNR STD_MOD1 of a second order ?? modulator by
using second and third order MOD1 polyphase comb filters.
74
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`Continueadding all Tables, if any, of the other chapters the same way JEEEEEEEEEEŠEEEEEEEEEE…EEEEEEEEEE.
vii
List of Abbreviations
Important:
Sort the abbreviations alphabetically as shown below:
ADC: Analog To Digital Converter
ASIC: Application Specific Integrated Circuit.
DAC: Digital To Analog Converter
DFE:
Digital Front End
DUC: Digital Up Conversion
DDC: Digital Down Conversion
DSP:
Digital Signal Processing
DPRR:
Dynamic Power Reduction Ratio
FIR:
Finite Impulse Response
FPGA: Field Programmable Gate Array
GSM: Global System for Mobile communications system
LUT:
Look-Up Table
MAC:
Multiplication and Accumulation
MOD1: The First Modified Technique
MOD2: The Second Modified Technique
OSR:
Over Sampling Ratio
ODPRR: Overall Dynamic Power Reduction Ratio
PRR:
Power Reduction Ratio
SDR:
Software Defined Radios
SRC:
Sample Rate Conversion
SOI: Signal Of Interest
UMTS: Universal Mobile Telecommunication System
VLSI:
Very Large Scale Integrated circuits
viii

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